1. Field of the Invention
The present invention relates to a repeater for receiving and regenerating a frame-multiplexed signal, wherein a timing signal, i.e., a clock, is extracted from the received signal, a timing of frame synchronization is detected in the received signal, and data included in the received signal is again incorporated in a regenerated frame-multiplexed signal and retransmitted.
2. Description of the Related Art
FIG. 1 shows a part of the construction of a conventional repeater, relating to the present invention.
In FIG. 1, reference numeral 11 denotes a frame synchronization circuit, 12 denotes a master clock generator, 13 denotes a selector swich, 15 denotes a frame regenerating circuit, and 18 denotes an AND gate.
A frame-multiplexed signal, which has been transmitted on a transmission line (not shown) or on a radio channel, along which the repeater of FIG. 1 is located, is demodulated in a demodulator (not shown), and a timing signal (hereinafter called a receiving clock) is extracted from the demodulated signal in a timing (extracting) circuit (not shown). The demodulated (data) signal is denoted by DATA.sub.i, and the receiving clock is denoted by CLK.sub.i.
The frame synchronization circuit 11 detects a timing of frame synchronization for each frame, for example, by detecting a predetermined frame synchronization pattern in each frame. By the frame synchronization, the predetermined frame synchronization pattern and an auxiliary signal AUX.sub.o, which transmits, for example, statuses (including alarm) of the repeater and the transmission line, are separated. And the remaining data after the auxiliary signal AUX.sub.o and the predetermined frame synchronization pattern are separated, i.e., real data transmitted through the transmission line, which is denoted by DATA, is input into the frame regenerating circuit 15.
The timing of frame synchronization for each frame is output from the frame synchronization circuit 11 as a frame synchronization signal SYNC1 (hereinafter called received frame synchronization signal). In addition, the frame synchronization circuit 11 outputs an alarm signal ALRM, when the above-mentioned frame synchronization timing cannot be detected. A failure in the detection of the timing of frame synchronization occurs, for example, due to a break in a transmission line, a malfunction in the preceding repeater or terminal station, or a high error rate in a received (data) signal.
Normally, the receiving clock CLK.sub.i and the received frame synchronization signal SYNC1 are input into the frame regenerating circuit 15. An auxiliary signal AUX.sub.i, which may includes a status of the repeater, or other information to be transmitted from the repeater to a terminal station, is also input into the frame regenerating circuit 15.
The frame regenerating circuit 15 regenerates frame-multiplexed data, i.e., receives the real data signal DATA and the auxiliary signal AUX.sub.i as data signals, and the receiving clock CLK.sub.i and the received frame synchronization signal SYNC1 as timing signals, and then multiplexes the real data signal DATA and the auxiliary signal AUX.sub.i to form a frame-multiplexed data signal DATA.sub.o.
In the process of regeneration, the frame regenerating circuit 15 generates and inserts the predetermined frame synchronization pattern into each frame at a timing determined by a frame synchronization signal generated in the frame regenerating circuit 15 (hereinafter called regeneration frame synchronization signal).
The regeneration frame synchronization signal generated in the frame regenerating circuit 15, usually synchronizes with the received frame synchronization signal SYNC1, i.e., the received frame synchronization signal SYNC1 is used as the regeneration frame synchronization signal. However, if the received frame synchronization signal SYNC1 is not supplied to the frame regenerating circuit 15, the regeneration frame synchronization signal is generated from a clock supplied to the frame regenerating circuit 15.
The repeater also comprises a master clock generator 12, which generates a master clock CLK.sub.m. The master clock CLK.sub.m and the aforementioned receiving clock CLK.sub.i are input into the selector switch 13. The selector switch 13 selectively outputs the master clock CLK.sub.m or the receiving clock CLK.sub.i according to whether or not the alarm signal ALRM is active, i.e., whether the alarm signal ALRM is "ON" or "OFF". Therefore, when the frame synchronization circuit 11 fails to detect the timing of frame synchronization, the master clock CLK.sub.m, instead of the receiving clock CLK.sub.i, is supplied to the frame regenerating circuit 15.
Further, the received frame synchronization signal SYNC1 is supplied to the frame regenerated circuit 15 through an AND gate 18, wherein the alarm signal ALRM is input into one terminal of the AND gate 18 as a gate signal to control the input of the received frame synchronization signal SYNC1 into the frame regenerating circuit 15. Therefore, the received frame synchronization signal SYNC1 is input into the frame regenerating circuit 15 only when the frame synchronization circuit 11 successfully detects the timing of frame synchronization.
The frame-multiplexed data DATA.sub.o is output with an output clock CLK.sub.o, which has the same frequency as the output of the selector switch 13.
The above output data signal DATA.sub.o is input into a modulator (not shown) with the output clock CLK.sub.o, and then the modulated signal is transmitted on a transmission line or on a radio channel.
Since there is generally a phase difference between clocks generated independently in two sources, when the clock supplied to the frame regenerating circuit 15 is switched from a receiving clock CLK.sub.i to the master clock CLK.sub.m, or switched in the opposite direction, in the above construction, a clock having an abrupt phase difference from the preceding clock is input into the frame regenerating circuit 15, and therefore, a loss of frame synchronization occurs.
The loss of frame synchronization also causes a loss of frame synchronization in the following repeater, i.e., the loss of frame synchronization propagates in the following repeaters one by one in a transmission system having a plurality of repeaters.
Each repeater can independently recover frame synchronization from the above out-of-synchronization state, however, it takes a considerable time for the recovery, for example, 40 msec for each repeater.
When a malfunction is detected in a repeater, the occurrence of the malfunction must be reported to a terminal station, however, often in such a situation, the above loss of frame synchronization also occurs, simultaneously and therefore, a large information delay occurs.
In particular, in a system wherein a stand-by line is provided in addition to a line in operation, when a malfunction occurs in the line in operation, the occurrence of the malfunction must be reported to a station which controls switching between two lines, to recover the communication by switching from the malfunctioning line to the stand-by line as quickly as possible.
However, if the out-of-frame-synchronization state propagates in the following repeaters successively, the aforementioned large recovery time accumulates in each repeater, and consequently, a large total delay will be caused.
Therefore, a repeater is requred wherein the occurrence of a loss of frame synchronization can be avoided when a clock used to regenerate a frame data is switched to another clock.
In addition, when frame synchronization in a frame synchronization circuit has recovered, i.e., a detection of a timing of frame synchronization for each frame becomes possible after a failure of the detection, the regenerated signals must again be synchronized with the receiving clock and the detected timing of frame synchronization. However, the timing of frame synchronization in a regenerated frame-multiplexed signal is determined by a regeneration frame synchronization signal generated from the master clock CLK.sub.m, i.e., the timing of frame synchronization in a regenerated frame-multiplexed signal is independent from the received frame synchronization signal SYNC1. Therefore, if, in the construction of FIG. 1, the alarm signal ALRM becomes ON, the regeneration frame synchronization signal in the frame regenerating circuit 15 is abruptly changed to the received frame synchronization signal SYNC1. This abrupt change may cause an abrupt shift in the timing of frame synchronization, i.e., this may cause a loss of frame synchronization.